Abstract
Bu
çalışma, elektrot imal eden bir işletmede fırınlara ait iş emri atama ve
çizelgeleme problemi ile ilgilenmektedir. İmalatı yapılan her elektrot çeşidi
her fırına atanamamaktadır. Ayrıca her bir elektrot tipinin, işlem görebileceği
fırınlara ait bir öncelik sırası bulunmaktadır. Problemin diğer parametreleri
olarak, elektrotlara ait iş emri büyüklükleri, fırına girmeye hazır olma
zamanları, fırında pişme süreleri, soğuma süreleri, fırınların elektrot tipi
temelindeki kapasite büyüklükleri göz önüne alınmıştır. Pişme süreleri aynı
olan elektrot tiplerine ait iş emirleri, fırın kapasitesinin üzerine çıkmayacak
şekilde, eş zamanlı olarak fırına girip pişebilmektedir. Bu problem için bir
tamsayılı programlama modeli geliştirilmiştir. Modelin amacı, işleri elektrot
tiplerine göre öncelikli fırınlara atamak ve fırınların faydalı kullanım
oranlarını en büyüklemektir. Model çıktısı olarak, iş emirlerinin hangi fırına
hangi zaman aralığında atanacağına karar verilmektedir. Oluşturulan iki farklı
iş emri kümesi için model çalıştırılmış ve sonuçlar tartışılarak modelin
uygulanabilirliği ortaya konmuştur.
References
- Kuru B. Fırın Çizelgeleme Problemi için Tamsayılı Programlama Yaklaşımı. Lisans Tezi, Celal Bayar Üniversitesi, Endüstri Mühendisliği Bölümü, Manisa, Türkiye, 2015.
- Edis EB, Kuru B. “Özel karakteristiklere sahip fırınlara iş yükleme ve çizelgeleme problemine tamsayılı programlama yaklaşımı”. 35. Yöneylem Araştırması ve Endüstri Mühendisliği Ulusal Kongresi, Ankara, Türkiye, 9-111 Eylül 2015.
- Mathirajan M, Sivakumar AI. "A literature review, classification and simple meta-analysis on scheduling of batch processors in semiconductor". The International Journal of Advanced Manufacturing Technology, 29(9-10) 990-1001, 2006.
- Mönch L, Fowler JW, Dauzère-Pérès S, Mason SJ, Rose O. “A survey of problems, solution techniques and future challenges in scheduling semiconductor manufacturing operations”. Journal of Scheduling, 14(6), 583-599, 2011.
- Azizoglu M, Scott W. "Scheduling a batch processing machine with incompatible job families". Computers & Industrial Engineering, 39(3), 325-335, 2001.
- Koh SG, Koo PH, Ha JW, Lee WS. “Scheduling parallel batch processing machines with arbitrary job sizes and incompatible job families”. International Journal of Production Research, 42(19), 4091-4107, 2004.
- Melouk S, Damodaran P, Chang PY. “Minimizing makespan for single machine batch processing with non-identical job sizes using simulated annealing”. International Journal of Production Economics, 87(2), 141-147, 2004.
- Chang PY, Damodaran P, Melouk S. “Minimizing makespan on parallel batch processing machines”. International Journal of Production Research, 42(19), 4211-4220, 2004.
- Mönch L, Balasubramanian H, Fowler JW, Pfund ME. “Heuristic scheduling of jobs on parallel batch machines with incompatible job families and unequal ready times”. Computers & Operations Research, 32(11), 2731-2750, 2005.
- Chou FD. “A joint GA+ DP approach for single burn-in oven scheduling problems with makespan criterion”. The International Journal of Advanced Manufacturing Technology, 35(5-6), 587-595, 2007.
- Xu S, Bean JC. “A genetic algorithm for scheduling parallel non-identical batch processing machines”. IEEE Symposium Computational Intelligence in Scheduling, Hawaii, USA, 1-5 April 2007.
- Kashan AH, Karimi B, Jenabi M. "A hybrid genetic heuristic for scheduling parallel batch processing machines with arbitrary job sizes". Computers and Operations Research 35(4), 1084-1098, 2008.
- Mazumdar CS, Mathirajan M, Gopinath R, Sivakumar AI. “Tabu Search methods for scheduling a burn-in oven with non-identical job sizes and secondary resource constraints”. International Journal of Operational Research, 3(1-2), 119-139, 2008.
- Chung SH, Tai YT, Pearn WL. “Minimising makespan on parallel batch processing machines with non-identical ready time and arbitrary job sizes”. International Journal of Production Research, 47(18), 5109-5128, 2009.
- Wang HM, Chou FD. “Solving the parallel batch-processing machines with different release times, job sizes, and capacity limits by metaheuristics”. Expert Systems with Applications, 37(2), 1510-1521, 2010.
- Zhu Z, Heady RB. “Minimizing the sum of earliness/tardiness in multi-machine scheduling: a mixed integer programming approach”. Computers and Industrial Engineering, 38(2), 297-305, 2000.
- IBM Corp. IBM ILOG CPLEX Optimization Studio 12.6.2, 2013.
Abstract
This
study deals with a job allocation and scheduling problem of batch processing
ovens belonging to a factory that manufactures welding electrodes. Each
electrode type may not be heated on all of the ovens. Besides, there exists a
priority order of ovens for each electrode type. The other inputs are; work
order amounts of electrodes, the ready times, heating times, cooling down
times, and the capacity of each oven with respect to the electrode types. The
work orders with the same heating time may be heated simultaneously without
exceeding the oven capacity. For the defined problem, an integer programming
model is developed. The objective function is to assign the work orders to the
preferred ovens as possible and to maximize the utilization rates of ovens. The
model determines which work order will be heated on which machine and in which
time interval. The model results are launched for two different work order
sets. Finally, by discussing the results, the applicability of the model is
demonstrated.
References
- Kuru B. Fırın Çizelgeleme Problemi için Tamsayılı Programlama Yaklaşımı. Lisans Tezi, Celal Bayar Üniversitesi, Endüstri Mühendisliği Bölümü, Manisa, Türkiye, 2015.
- Edis EB, Kuru B. “Özel karakteristiklere sahip fırınlara iş yükleme ve çizelgeleme problemine tamsayılı programlama yaklaşımı”. 35. Yöneylem Araştırması ve Endüstri Mühendisliği Ulusal Kongresi, Ankara, Türkiye, 9-111 Eylül 2015.
- Mathirajan M, Sivakumar AI. "A literature review, classification and simple meta-analysis on scheduling of batch processors in semiconductor". The International Journal of Advanced Manufacturing Technology, 29(9-10) 990-1001, 2006.
- Mönch L, Fowler JW, Dauzère-Pérès S, Mason SJ, Rose O. “A survey of problems, solution techniques and future challenges in scheduling semiconductor manufacturing operations”. Journal of Scheduling, 14(6), 583-599, 2011.
- Azizoglu M, Scott W. "Scheduling a batch processing machine with incompatible job families". Computers & Industrial Engineering, 39(3), 325-335, 2001.
- Koh SG, Koo PH, Ha JW, Lee WS. “Scheduling parallel batch processing machines with arbitrary job sizes and incompatible job families”. International Journal of Production Research, 42(19), 4091-4107, 2004.
- Melouk S, Damodaran P, Chang PY. “Minimizing makespan for single machine batch processing with non-identical job sizes using simulated annealing”. International Journal of Production Economics, 87(2), 141-147, 2004.
- Chang PY, Damodaran P, Melouk S. “Minimizing makespan on parallel batch processing machines”. International Journal of Production Research, 42(19), 4211-4220, 2004.
- Mönch L, Balasubramanian H, Fowler JW, Pfund ME. “Heuristic scheduling of jobs on parallel batch machines with incompatible job families and unequal ready times”. Computers & Operations Research, 32(11), 2731-2750, 2005.
- Chou FD. “A joint GA+ DP approach for single burn-in oven scheduling problems with makespan criterion”. The International Journal of Advanced Manufacturing Technology, 35(5-6), 587-595, 2007.
- Xu S, Bean JC. “A genetic algorithm for scheduling parallel non-identical batch processing machines”. IEEE Symposium Computational Intelligence in Scheduling, Hawaii, USA, 1-5 April 2007.
- Kashan AH, Karimi B, Jenabi M. "A hybrid genetic heuristic for scheduling parallel batch processing machines with arbitrary job sizes". Computers and Operations Research 35(4), 1084-1098, 2008.
- Mazumdar CS, Mathirajan M, Gopinath R, Sivakumar AI. “Tabu Search methods for scheduling a burn-in oven with non-identical job sizes and secondary resource constraints”. International Journal of Operational Research, 3(1-2), 119-139, 2008.
- Chung SH, Tai YT, Pearn WL. “Minimising makespan on parallel batch processing machines with non-identical ready time and arbitrary job sizes”. International Journal of Production Research, 47(18), 5109-5128, 2009.
- Wang HM, Chou FD. “Solving the parallel batch-processing machines with different release times, job sizes, and capacity limits by metaheuristics”. Expert Systems with Applications, 37(2), 1510-1521, 2010.
- Zhu Z, Heady RB. “Minimizing the sum of earliness/tardiness in multi-machine scheduling: a mixed integer programming approach”. Computers and Industrial Engineering, 38(2), 297-305, 2000.
- IBM Corp. IBM ILOG CPLEX Optimization Studio 12.6.2, 2013.
Details
| Subjects | Engineering |
|---|---|
| Journal Section | Research Article |
| Authors | |
| Publication Date | March 1, 2017 |
| Published in Issue | Year 2017 Volume: 23 Issue: 1 |
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